Design Team and Experience
Eximietas’s engineering teams have extensive experience in designing highly complex ASICs. We provide network processors, graphic processors, and low-power designs with design sizes ranging from 1 million gates to over 50 million gates across all major foundries.
Our design teams have deep knowledge in 28nm, 40nm, 65m, 90nm and 130nm technologies along with comprehensive experience in the selection, qualification and integration of third-party IP. Our technical staff has experience in all areas of physical implementation, including synthesis, floor planning, placement, CTS, routing, STA, signoff, and physical verification. With our numerous roll outs, we help you with the ideal product launch.
Methodology
Our design methodology is built from a correct-by-construction concept ensuring quick turnaround time and predictability. With a discipline and diligent approach to design, we are able to provide accurate timelines and schedules.
Our highest priority is to provide first-time silicon success. It is absolutely critical that the physical implementation teams work with other teams such as, the system design team, package design teams, DFT teams to ensure a seamless process. Communication is the key to successful rollout and eventual product launch, and that is what Eximietas provides. Eximietas works with all the industry standard tools, vendors and flows.
Design Process for RTL/Netlist to GDSII Handoff
With a defined 3-phase milestone approach with our customers, we are able to identify issues, create solutions and provide feedback to customer teams during the entire physical implementation process and ensure an aggressive schedule to launch without sacrificing quality.
Eximietas takes your design from RTL/Netlist to GDSII and performs all the physical implementation activities in house to achieve a successful launch. This includes synthesis, P&R, STA and physical verification sign off.
